1. Field of the Invention
The present invention relates to a wafer processing method for forming a via hole in a wafer such as a semiconductor wafer.
2. Description of the Related Art
In a semiconductor device fabrication process, a plurality of crossing division lines called streets are formed on the front side of a substantially disk-shaped wafer to thereby partition a plurality of regions where devices such as ICs and LSIs are respectively formed. The semiconductor wafer is cut along the streets to thereby divide the regions where the devices are formed from each other, thus obtaining individual semiconductor chips.
For the purposes of achieving smaller sizes and higher functionality of equipment, a module structure having the following configuration is in practical use. This module structure is such that a plurality of devices are stacked and bonding pads provided on these stacked devices are connected to each other. In this module structure, via holes are formed in a semiconductor wafer at positions corresponding to the bonding pads, and a conductive material such as copper is embedded in each via hole so as to be connected to the corresponding bonding pad (see Japanese Patent Laid-open No. 2003-163323, for example).
Generally, each via hole in the semiconductor wafer mentioned above is formed by using a drill. However, the diameter of each via hole in the semiconductor wafer is 90 to 300 μm, so that the formation of each via hole by using a drill causes a reduction in productivity. To solve this problem, there has been proposed a hole forming method for a wafer composed of a substrate and a plurality of devices formed on the front side of the substrate, a plurality of bonding pads being formed on each device, wherein a pulsed laser beam is applied to the substrate from the back side thereof to thereby efficiently form a plurality of via holes respectively reaching the plural bonding pads (see Japanese Patent Laid-open Nos. 2007-67082 and 2007-330985, for example).